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Workshop on Hardware for Deep Learning

A one-day workshop on Hardware for Deep Learning was conducted on 5th October 2024, led by Muhammed Raees P.C. (Junior Research Fellow, NIT Trichy, and CTO of Bayes Tech) and Akshayraj M.R. (Co-Founder, Bayes Tech).

The workshop focused on introducing participants to FPGA programming and its applications in deep learning. Attendees learned to design, synthesize, and deploy circuits using Xilinx tools and implemented these designs on the Zybo board, gaining hands-on experience with real-time hardware operations.

The sessions bridged theoretical concepts with practical applications, empowering participants with essential skills in hardware design and its integration into AI systems. This event was highly beneficial for fostering knowledge in FPGA-based solutions for deep learning.